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A 32KB 4-way set associative instruction cache supports a cache line size of 64 bytes. How many bits are required to index a cache line in a way?
Which of the following ARM processors has the best energy efficiency (measured in mW/MHz)?
The following ARM instruction can be used to return from an exception:
movs pc, lr
Apart from the program counter, which register is updated by this instruction?
An undefined instruction will cause an Undefined Instruction exception to be taken when:
When linking with the standard C library, which library functions MUST be redefined in order to port your code to a new piece of production hardware?
A Just-In-Time compiler writes instructions to a region of memory that is configured using a writeback cache strategy. For the locations that have been written, what is the MINIMUM cache maintenance that MUST be performed before the new instructions can be reliably executed?
Which TWO of the following mechanisms cause the ARM processor to take an abort? (Choose two)
Which one of the following statements best describes the function of vector catch logic?
When using the default ARM tool-chain libraries for bare-metal applications. I/O functionality is rerouted and handled by a connected debugger. This is often referred to as semihosting. Which one of the following explanations BEST describes how this feature can be implemented by a debugger?
According to the AAPCS, how many bytes are used to store a C variable of type 'int' in memory?
In a hardware system that runs software providing secure systems, which of the following describes the behavior of external memory and peripherals?
What is the value of R2 after execution of the following instruction sequence?
MOV R3, #0xBA
MOV R2/#0x10
BIC R2, R3, R2
In a Cortex-A processor, assume an initial value of R1 =0x80004000.
If the following instruction causes a data abort, what value will R1 contain on entry to the abort handler?
LDR R0, [R1, #8]!
When debugging an embedded Linux system, which one of the following techniques can be used to halt a single user thread, while allowing other threads to continue to run during the debug process?
Which of the following instructions can be used to enter a power saving mode?
Which of the following features was added in version 2 of the ARM Architecture Advanced SIMD extensions?
A simple system comprises of the following memory map:
Flash - 0x0 to 0x7FFF
RAM - 0x10000 to 0X17FFF
When conforming to the ABI, which of the following is a suitable initial value for the stack pointer?
For Cortex-A series cores, what instruction(s) are recommended to implement a mutex or semaphore?
When using the ARM Compiler (armcc), which of the following possible keywords can be used to remove padding bytes from a structure?
When an ARMv7-A MPCore system is in SMP mode, which of the following TWO operations can the processor handle automatically? (Choose two)
TESTED 05 May 2024