FlashArray-Implementation-Specialist Questions and Answers

For the FlashArray//X50 R2 and R3 models, the default Fibre Channel (FC) configuration utilizes a4-port PCIe Fibre Channel card installed in Slot 0.

The hardware architecture of the FlashArray//X series differentiates slot usage based on the model controller chassis.

FlashArray//X10 and //X20:These lower-end models utilizeSlot 2for host connectivity (Fibre Channel or iSCSI) because Slots 0 and 1 are typically reserved or occupied by onboard controllers/mezzanine cards. The standard card for these models is often a 2-port card.

FlashArray//X50, //X70, and //X90:These mid-to-high-range models feature a different PCIe bus layout.Slot 0is the primary designated slot for Host I/O connectivity. To support the higher performance capabilities and port density requirements of the X50, Pure Storage defaults to4-portFC cards (typically 16Gb or 32Gb).

Therefore, identifying the model number is crucial. Since the question specifies theX50(R2/R3), the correct placement is Slot 0, and the correct card type is the 4-port model. Option A is incorrect because the 2-port card is not the standard default for the performance-tier X50. Option B describes the configuration for an X20, not an X50.

TheFlashArray//XR4maintains the standard port assignment convention established in previous generations for its onboard Ethernet interfaces.

ETH2 and ETH3are the default ports designated forReplicationtraffic.

ETH0 and ETH1are reserved for Management.

ETH2 and ETH3are configured by Purity defaults to handle the heavy bandwidth of asynchronous or synchronous replication.

While these assignments can be modified in software, the physical ports labeled eth2 and eth3 on the rear of the chassis are the intended primary interfaces for this function. Implementation Engineers should cable these ports to the replication network switches during the initial install.

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When new capacity (a data pack) is physically installed into a FlashArray, the drives are detected by the system but are not automatically added to the storage pool to prevent accidental data overwrites or configuration errors. They appear in an "unadmitted" state.

To logically add these drives to the array's capacity, the Implementation Engineer must explicitly admit them. The command to perform this action ispurearray drive admit(or puredrive admit in some contexts, but purearray drive admit is the specific option provided and valid). This command triggers the Purity software to format the new drives, add them to the system's write groups, and begin rebalancing data across the expanded capacity. Without running this admission command, the drives will remain visible but unusable for storage.

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FlashArray performance and capacity management rely on "Write Groups"—logical groupings of drives that Purity uses to stripe data. A "Wide Write Group" typically consists of roughly 20 drives and offers better performance and capacity efficiency than smaller groups. However, Purity generally requires write groups to be contained within a single physical enclosure (chassis or shelf) to maintain failure domain boundaries and performance predictability.

In this scenario, the customer wants the new 91TB pack to form a wide write group. The chassis already has a 91TB group and a 45TB group. The shelf has one 45TB group. To create a wide write group with the new 91TB pack, it is best to pair it with an existing matching or compatible group in the same enclosure. Since the chassis is full (20 drives), you cannot simply add the new pack there without moving something.

The correct procedure is tomove the 45TB write group from the chassis to the shelf. This frees up 10 slots in the chassis. The shelf now holds two 45TB groups (which is valid). The chassis now has the original 91TB group and 10 empty slots. The engineer can then install the new 91TB data pack into those empty chassis slots. Purity will then be able to merge or manage these two 91TB packs (the existing one and the new one) as a highly efficient configuration, potentially forming the requested wide write group or at least balancing the high-capacity drives within the controller chassis where bandwidth is highest. This physical rearrangement is necessary because write groups cannot span across the chassis-shelf interconnect.

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During a controller upgrade (e.g., //X to //XL), the puresetup script attempts to migrate network configurations from the old controller's ports to the new controller's ports. If the script detects that certain ports configured on the source array are physically missing or "link down" on the target array, it halts to prevent a configuration mismatch that could cause a service outage.

The error message explicitly lists the affected ports. The correct resolution path is to:

Identify the services:Determine if the missing ports are critical (e.g., a replication link that hasn't been cabled yet) or non-critical (e.g., an unused interface).

Re-run with override:Execute the puresetup command again, this time appending the specific flags or arguments (often suggested in the error output or upgrade guide) to explicitly acknowledge and include those affected ports. This tells the script, "I know these ports are down/missing; proceed with the migration anyway."

This allows the upgrade logic to complete the configuration transfer so the new controller can boot, after which the engineer can physically troubleshoot the link status.

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A "4X Module" kit is specifically designedto widen an existing write group(RAID set).

Write Group Geometry:In standard FlashArray//X configurations, DirectFlash Modules (DFMs) operate in "Write Groups" (typically 10 modules wide for a standard data pack). However, to offer more flexible entry points or capacity expansion options, Pure Storage allows configurations that start with smaller write groups (e.g., 6 modules).

Widening:When a customer wants to expand capacity or performance on these smaller configurations without adding a full new 10-pack, they can purchase a widening kit (in this case, 4 modules).

Process:The Implementation Engineer installs these 4 modules into the empty slots. The Purity operating system then logically integrates these new drives into the existing narrow write group, "widening" it to the standard width (e.g., 6 + 4 = 10). This operation redistributes parity and data across the full set of 10 drives, improving performance and efficiency.

During complex maintenance procedures like a controller upgrade or replacement (puresetup replace), it is often necessary to verify the physical hardware identity of the chassis to ensure compatibility with the new controllers or software image.

The commandhwconfig --modelis the specific CLI tool used at the engineering/boot level to return the chassis model string (e.g., FA-X50R3 or FA-XL170). This confirms the hardware platform identity.

hwconfig --all would dump a massive amount of verbose configuration data, making it difficult to quickly identify just the model.

pureversion -a displays the version of the Purity operating system software, not the physical hardware model of the chassis.

Therefore, hwconfig --model is the correct and most efficient command for the Implementation Engineer to validate the hardware platform identity during the upgrade workflow.

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To reduce SafeMode protections (such as shortening the retention period or disabling the eradication timer),two authorized SafeMode approversmust authenticate and approve the request viaPure1 step-up authentication.

SafeMode is a ransomware protection feature designed to prevent the accidental or malicious deletion of snapshots. Because reducing these protections weakens the array's security posture, Pure Storage enforces a strict "Ratchet" authorization process.

The Process:Unlike standard support requests, a single admin or local user cannot authorize this change (making Option C incorrect). The customer must have previously designated specific individuals as "SafeMode Approvers" in their Pure1 portal.

Authorization:When a request to weaken the policy is made, Pure Support triggers a verification workflow. Two of these designated approvers must log into Pure1 and perform a secondary authentication (often involving a PIN or TOTP) to explicitly "sign off" on the reduction. This "two-person rule" ensures that a compromised credential or a rogue insider cannot unilaterally expose the organization's backup data to destruction.

After executing the puredb run giveback --safe command during a manual controller upgrade or specific non-disruptive upgrade (NDU) procedure, the Implementation Engineer must wait for10 minutesbefore proceeding to the next step (typically upgrading the peer controller).

The giveback command instructs the recently upgraded controller (e.g., CT0) to resume its primary role and take back ownership of its assigned storage resources and I/O handling from the peer controller. This process triggers a failover event for the host multipathing software.

Path Stabilization:The 10-minute wait time is a critical safety buffer mandated to ensure that all host-side multipathing drivers (MPIO) have successfully recognized the restored paths to the upgraded controller and have stabilized.

Risk Mitigation:Proceeding too quickly—before the hosts have fully settled and paths are marked as "Active/Optimized"—could lead to an "all paths down" (APD) scenario when the second controller is taken offline for its upgrade. This wait time verifies that the upgraded node is fully functional and carrying load, adhering to the strict "availability first" philosophy of FlashArray upgrades.

The FlashArray//XR4 utilizes onboard 100GbE RoCE (RDMA over Converged Ethernet) ports for connecting to the first loop of DirectFlash Shelves, removing the need for dedicated PCIe add-in cards for the base configuration. The port mapping for these onboard backend ports differs from previous generations.

On the //XR4 controller chassis, the specific Ethernet interfaces designated for thefirst DirectFlash Shelf loopare typically the high-numbered onboard ports. In this specific exam context and hardware revision,ETH 18 and ETH 19are identified as the correct primary backend connectivity ports .

Implementation Engineers must connect the QSFP28 cables from the "uplink" ports on the first shelf (IOM0 and IOM1) toETH18 and ETH19on the controllers (CT0 and CT1) respectively. Using incorrect ports (like ETH0/1, which are management) would result in the shelf not being detected by the storage fabric.

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The FlashArray//X20R4-LL (Low-Line) model is a specific configuration designed for lower capacity and power entry points. Unlike the standard //X or //XL models which can support fully populated chassis and shelves, the "Low-Line" configurations often come with strict hardware limitations regarding power draw and drive count. A known constraint for specific Low-Line chassis upgrades, particularly when moving to the X20R4-LL, is a limitation on the number of DirectFlash Modules (drives) supported due to the power supply unit (PSU) capacity or thermal design targeted for that specific SKU.

In this scenario, if the source array (X20R3) was populated with more drives than the target X20R4-LL supports—specifically more than 10 drives—the upgrade validation checks (such as those performed by the upgrade script or Purity health checks) will flag a failure. Even though the voltage readings are technically correct (indicating the PDUs are providing power), the check fails because the hardware configuration exceeds the supported power budget for that specific chassis model.

Implementation Engineers must verify the drive count of the source array against the specifications of the target "Low-Line" array during the planning phase. If the source array has 11 or more drives, the target hardware cannot be an LL model; it would require a standard model to support the additional power load of the extra drives. This check prevents the array from booting into a state where it might experience power contention or thermal shutdown under load.

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To performparallel evacuation of multiple SAS shelves, the FlashArray must be runningPurity//FA 6.0or higher.

Prior to Purity version 6.x, the shelf evacuation process (used during capacity consolidation or shelf retirement) was a serialized operation. An Implementation Engineer had to issue the evacuation command for one shelf, wait for all data to move to other storage within the array, and physically remove that shelf before starting the process for the next one. This could be time-consuming for large clusters of legacy SAS shelves.

With the release of Purity//FA 6.0, Pure Storage introduced significant enhancements to data mobility and background operational efficiency, including the ability to issue evacuation commands for multiple external shelves simultaneously. The system's intelligent scheduler manages the I/O bandwidth to ensure that the parallel data movement does not impact frontend host performance. While having sufficient free space (Option C) is logically necessary to hold the evacuated data, the specificfunctional capabilityto trigger concurrent evacuations is a software feature tied strictly to the Purity 6.x code base. Option B is irrelevant to the software capability of the array.

Upgrading from a FlashArray//X to a FlashArray//XL involves a significant architectural change, often requiring a data migration or a specific "chassis replacement" workflow known as a Data-in-Place upgrade where the new chassis temporarily acts as an expansion shelf. In this specific procedure, the new FlashArray//XL chassis is not immediately populated with its final drives (DFMDs) before power-on because it first needs to be configured to accept data or join the cluster in a controlled state.

The procedure requires the Implementation Engineer to boot the FlashArray//XL chassis first and configure it intoShelf Mode (SPM). Onlyafterthe chassis is successfully running in this mode—effectively acting as a passive SAS/Ethernet attached shelf to the existing controllers—are the DirectFlash Modules (DFMd) inserted.

Inserting them earlier could cause the array to attempt a full boot sequence or initialize a new array instance, complicating the upgrade logic. By waiting until Shelf Mode is confirmed, the engineer ensures that the modules are recognized correctly as part of the migration target resources, allowing Purity to manage the layout and data redistribution correctly from the source array.

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To verify the status, presence, and admission of a specific data pack, the correct command ispuredrive list --pack CH0.BAY10.

In the context of FlashArray geometry, a "Write Group" (RAID set) is formed by combining DirectFlash Modules. A"Wide Write Group"typically consists of 10 modules (a full data pack). When an engineer installs a standard 10-pack of drives (Bays 10-19), verifying that all 10 drives are successfully recognized and "admitted" confirms that the system has formed the intended wide write group.

The puredrive list command with the --pack argument filters the output to show only the drives in that specific pack. The engineer checks that all 10 drives are listed and their status is"healthy"or"admitted". If fewer drives were admitted (e.g., only 5), it would indicate a "narrow" write group or a hardware issue.

Option A (find_drive.py)is a utility script used to physically locate a drive by blinking its LED, not to check logical RAID configuration.

Option B (puredb list drives)is an internal engineering command (puredb) that is generally not intended for standard field verification and may require root-level access. The puredrive command is the standard CLI tool for this validation.

TheFibre Channel (FC)I/O card type is the only option listed that is universally compatible and supported acrossallFlashArray models, from the entry-level //X10 and //X20 up to the high-end //X90 and //XL.

Fibre Channel:Pure Storage architectures rely heavily on Fibre Channel as the primary enterprise storage protocol. All chassis generations and controller sizes feature PCIe risers compatible with Pure's standard 16Gb or 32Gb Fibre Channel HBAs.

Ethernet/iSCSI:While all arrays support iSCSI, the physicalcard typevaries.

10GBase-T:This refers to "copper" Ethernet (RJ45). This card type isnotsupported on all models. High-end FlashArrays (like the //X70, //X90, and //XL) typically utilize SFP+ or QSFP28 cages for optical connectivity (10/25GbE or 40/100GbE) and do not standardly support 10GBase-T copper cards due to power and latency characteristics.

Therefore, while theprotocol(iSCSI) is supported everywhere, the specific physicalcard(10GBase-T) is not. Fibre Channel cards remain the consistent hardware constant across the entire product line.

On a newFlashArray//XR4installation, the Implementation Engineer must run thecobalt_check.pyscript before executing puresetup newarray.

The FlashArray//XR4 represents a significant hardware architectural shift (internally codenamed or associated with the "Cobalt" platform generation). This platform introduces new PCIe layouts, NVMe backplanes, and controller components that require specific validation beyond the standard legacy checks. The cobalt_check.py script is a specialized hardware diagnostic tool pre-loaded on the manufacturing image of //XR4 controllers.

Its purpose is to verify that the specific hardware components of the R4 platform—such as the status of the internal NVMe interconnects, the correct population of the chassis, and the health of the new controller mainboard—are functioning within strict tolerances. Running this check ensures that the physical layer is 100% healthy before the Purity operating system attempts to initialize the database and claim the storage media. Option A (pureboot list) checks boot versions but not hardware health, and Option C (purehw list) is a general command that might not catch the specific low-level architectural issues the cobalt_check.py script is designed to identify on this specific generation.

To ensure that all volumes connected to a specific host areautomaticallyprotected, the Implementation Engineer shouldadd the Host object as a member of the Protection Group (PGroup).

Purity's protection policy logic allows for membership at different granularities:

Volume Membership:You can add individual volumes to a PGroup. However, if a new volume is provisioned and attached to the host later, it willnotbe protected until an admin manually adds it to the PGroup (making Option A and B manual, error-prone processes).

Host/Host Group Membership:By adding theHostentity to the Protection Group, Purity applies a policy inheritance rule.Any volumecurrently connected to that host—and crucially,any volume attached in the future—automatically inherits the protection policy (snapshot schedule, replication target) of that group. This "set and forget" configuration is the best practice for ensuring compliance and data safety without requiring manual intervention for every provisioning task.

FlashArrays require outbound HTTPS connectivity to reach Pure1 for log uploads, phone home, and remote assist. In many enterprise environments, direct internet access is blocked, and traffic must be routed through an HTTP/HTTPS proxy.

To configure this setting in Purity via the CLI, the correct command ispurearray setattr --proxyfollowed by the full proxy URL (including protocol and port). The setattr (set attribute) subcommand is the standard method for modifying array-wide configuration parameters like the array name, idle timeout, and proxy settings. The other command variations (puresetup proxy or purearray configure) are incorrect syntax for this specific operation. This configuration is often a critical step during the "Pre-Flight" or initial setup phase to ensure the array can "phone home" immediately upon deployment.

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To expand a FlashArray//X10 from a5/5(fully populated chassis with two 5TB equivalent packs) to an11/11(two 11TB equivalent packs) configuration, the correct action is toinstall a swing shelf with loan capacity.

The Constraint:The "5/5" notation implies the chassis slots are already occupied by the existing media. Since the customer isreplacingthe existing packs with larger ones (Capacity Consolidation) rather than just adding new ones, the engineer needs a place to put the data during the swap.

Why Swing Shelf:The FlashArray//X10 chassis has limited slots. You cannot simply pull a pack (Option A) if the remaining pack doesn't have enough free space to hold all the data (which is typical in upgrade scenarios). ASwing Shelf(temporary external SAS or NVMe shelf provided by Pure) is attached to the array. The data is evacuated from the internal drives to this shelf. Once the internal slots are empty, the new 11TB packs are installed. The data is then moved back from the shelf to the new packs, and the shelf is removed.

The FlashArray//XR5 (and //E family) introduces a significant architectural shift regarding Non-Volatile RAM (NVRAM). In previous generations (like R2/R3), NVRAM was provided by dedicated PCIe modules installed in specific "NVB" slots in the chassis.

In the //XR5 architecture, Pure Storage moved toDistributed NVRAM. The NVRAM functionality is integrated directly into the DirectFlash Modules (specifically theDFMDs- DirectFlash Module with Distributed NVRAM). This allows the NVRAM capacity to scale with the storage and removes the bottleneck of dedicated slots.

For a system to function correctly, a minimum number of these NVRAM-equipped modules must be present to form the initial write buffer and system quorum. The standard installation requirement for an //XR5 is that thefirst 10 slots (Slots 0-9)are populated with these specific DFMDs. This ensures there is sufficient distributed NVRAM capacity to boot the Purity operating environment and handle incoming writes safely. The Implementation Engineer must populate these slots first before adding standard DFMs in the remaining slots.

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TheFlashArray//XLfeatures a5 Rack Unit (5U)chassis height.

This form factor represents a significant change from the standard FlashArray//X and //C series, which utilize a 3U chassis. The increase to 5U is engineered to support the massive performance and density requirements of the //XL platform.

Key Design Features:The 5U height accommodates:

Dual Controllers:Larger, high-performance controllers with increased airflow requirements.

40 DirectFlash Module Slots:Double the drive density of the 3U chassis (which holds 20), allowing for petabytes of effective capacity in the base unit.

4 Power Supplies:A 2+2 redundant power architecture.

9 PCIe Slots:Extensive I/O expansion for host and backend connectivity.

Airflow:Dedicated fan modules and thermal ducting to cool the high-wattage components (up to 3.5kW max power draw).

TheFlashArray//XLcurrently supports a maximum of2 DirectFlash Shelves (DFS).

The FlashArray//XL is a high-density, performance-optimized platform housed in a 5U chassis.

Rack Unit Math:According to the FlashArray//XL specifications and site planning guide, the system supports a maximum configuration footprint of11 Rack Units (11U).

The base controller chassis occupies5U.

Each DirectFlash Shelf occupies3U.

Therefore: 5U (Base) + 3U (Shelf 1) + 3U (Shelf 2) =11U.

Capacity:Because the //XL chassis itself holds 40 DirectFlash Modules (compared to 20 in a standard //X), and each shelf holds 28 modules, a fully populated system with two shelves provides nearly 100 drives of capacity (40 + 28 + 28 = 96 drives). This massive density reduces the need for "daisy-chaining" large numbers of shelves like legacy SAS architectures. Adding a third shelf would push the total height to 14U, exceeding the current platform definition.

The command purehw list --all is the correct CLI instruction to view the comprehensive status of all hardware components, including theNVRAM modules.

Command Scope:While purehw list provides a general hardware summary, the --all flag (or specifying --type nvram) ensures that granular details about the NVRAM modules—such as their presence, health status, and firmware/update status—are displayed.

NVRAM Context:In FlashArray models that utilize dedicated NVRAM modules (like the FA-400, //M, or specific //X configurations), these components are critical for write acknowledgement. During an upgrade or installation, verification that these modules are "healthy" and "idle" (not destaging) is mandatory.

Incorrect Options:

purearray list (Option A) displays high-level array attributes like the array name, ID, and overall OS version, but not component-level hardware status.

puredrive list (Option B) is specifically for managing the storage media (SSDs/DirectFlash Modules) and does not report on the non-volatile RAM cache modules housed in the controller or chassis.

When adding a second DirectFlash Shelf to aFlashArray//XL, the connectivity utilizesPCIe Slot 6(in conjunction with Slot 0).

FlashArray//XL Architecture:The //XL chassis distributes its backend NVMe-oF (100GbE RoCE) connectivity across two dedicated PCIe slots to ensure redundancy and maximum bandwidth. As established in hardware diagrams,Slot 0(lower riser) andSlot 6(upper riser) are the designated slots for the 2-port 100GbE backend cards.

Expansion Logic:

First Shelf:Typically connects to Port 0 of the card in Slot 0 and Port 0 of the card in Slot 6 (providing HA).

Second Shelf:Connects to the remaining ports (Port 1) on thesame cardsin Slot 0 and Slot 6.

Exam Context:In the context of "which slot must be used" for the expansion or specifically highlighting the secondary backend slot distinct from the primary host slots,Slot 6is the correct identifier for the backend expansion capability on the //XL. Options A (Slot 0) is the primary, but C (Slot 6) is often the specific answer required to demonstrate knowledge of the //XL's unique split-riser backend layout compared to legacy arrays.

The commandpurenetwork listis used to identify the configuration and status of the array's logical network interfaces.

Command Output:Running purenetwork list provides a tabular view of all configured IP interfaces (Management, iSCSI, Replication). Critical columns in this output include:

Name:(e.g., vir0, eth0, eth1)

Address/Netmask:The IP configuration.

Gateway:Routing information.

Status:(e.g.,"enabled"or "disabled").

Usage:An Implementation Engineer uses this command to verify that the management VIP and physical interfaces are correctly configured and legally "up" (enabled) in the Purity software stack.

Distinctions:While purehw list is used forphysicalhardware link status (e.g., cable plugged in/link light), purenetwork is the primary namespace for IP-level validation. Options B and C (--all, --eth) are not the primary standard syntax for the general status view in this specific context; the base command provides the necessary summary data for initial verification.

The FlashArray//XL series has a specific, validated slot population rule for its PCIe cards to ensure optimal performance and thermal management. For a standard Fibre Channel (FC) configuration on aFlashArray//XLR5, the factory default shipment includes a specific arrangement of host I/O cards and offload engines.

The correct default configuration is:

PCIe Slot 3:4-Port 32Gb FC card.

PCIe Slot 5:2-Port 32Gb FC card.

PCIe Slot 6:DirectCompress Accelerator (DCA).

This layout (Option B) adheres to the //XL's architecture where specific slots are prioritized for frontend host I/O (like slots 3 and 5) and others for offload functions or backend connectivity. Implementation Engineers must verify cards are in these exact slots during the visual inspection. If cards are moved to incorrect slots (like slot 1 or 4 for primary FC in this specific config), the array may not boot or may fail to initialize the FC services correctly due to BIOS enumeration orders.

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Service clearance is a critical physical installation requirement to ensure that components (like controllers, fans, and drives) can be safely removed and replaced without obstruction.

For theFlashArray//XR4, the specific service depth requirements are:

Front Panel:216 mm (8.5 in.). This allows sufficient room to open the bezel, unlatch drives, and pull them out of the chassis.

Rear Panel:530 mm (20.9 in.). This larger clearance is necessary because the controllers themselves (which are long, heavy components) slide out from the rear of the chassis. The engineer needs enough space to fully extract the controller without hitting a wall or another rack door.

Adhering to these clearances prevents situations where a failed controller cannot be replaced because the rack is too close to a wall.

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Before performing a physical card addition (I/O expansion) on a specific controller, it should be in theSecondarystate.

The procedure for adding hardware to a FlashArray is a sequential, non-disruptive process. You cannot add a card to thePrimarycontroller because it is actively handling host I/O; opening it would cause a service outage. Therefore, the Implementation Engineer must first verify the cluster health and, if necessary, perform a manual failover (pureadm make --secondary) to ensure the target controller isSecondary.

Once the controller is Secondary (passing no I/O), the engineer proceeds to stop the Purity software (pureadm stop) and/or power down the controller to safely install the PCIe card. While the physical work happens when the controller is powered off/inactive, "Secondary" is the correct operational starting state required to begin the maintenance workflow safely. "Standby" is often used to refer to a controller that is powered on but not running Purity, which is a subsequent step, not the initial prerequisite state relative to the cluster role.

TheFlashArray//XLsupports0 (zero)SAS expansion shelves for permanent capacity.

Architecture:The FlashArray//XL is architected exclusively forNVMestorage media. Its backend connectivity utilizes 100GbE RoCE (RDMA over Converged Ethernet) to connect toDirectFlash Shelves (DFS). It does not possess the legacy SAS controllers or ports required to drive SAS expansion shelves.

Migration Exception:While a "SAS Swing Shelf" (containing legacy SSDs from an older array) might be temporarily attached during a specific Data-in-Place upgrade migration scenario, this is a transient state. In terms ofsupportedoperational configuration for storage capacity, the limit is zero. The platform relies entirely on DirectFlash Modules in the chassis and external DirectFlash Shelves.

Contrast:Older generations (FlashArray//M, FlashArray//X R1/R2) supported SAS shelves, but the //XL platform eliminates this protocol entirely in favor of end-to-end NVMe.

To facilitate aCapacity Consolidation(CapCon) in a chassis that is physically full (both data pack slots occupied) and logically utilized above the threshold to allow internal evacuation, the standard procedure requirestemporary external capacity, often referred to as "swing gear."

In this scenario, the FlashArray//X20 chassis is fully populated with two 22TB data packs. Since there are no empty slots to insert the new 45TB pack, one of the existing packs must be removed first. However, with the array at80% usage, the data residing on the pack designated for removal (roughly half the raw capacity) cannot fit into the remaining free space of the other pack.

Therefore, Pure Storage Support will provision aDirectFlash Shelf (DFS) containing temporary capacity(e.g., a 63TB pack as mentioned in Option B). The Implementation Engineer attaches this shelf, adds it to the system, and utilizes it as a destination to evacuate data from the old 22TB pack. Once the old pack is empty and removed, the new 45TB pack is installed into the chassis. Finally, the data is moved from the temporary shelf back into the new chassis capacity, and the temporary shelf is disconnected and returned. Option A is incorrect because an empty shelf provides no storage to offload data, and Option C is operationally unfeasible for most customers.

On standard 3-Rack Unit (3RU) FlashArray models (such as the FlashArray//X50, //X70, and //X90 series), the rear of the controller chassis features onboard 10GbE or 25GbE Ethernet ports. Pure Storage adheres to a strict convention for the default assignment of these ports to simplify deployment and troubleshooting.

ETH0 and ETH1are invariably reserved and configured forManagementtraffic. These are used to access the GUI, CLI, and for the array to communicate with Pure1.

ETH2 and ETH3are the designated default ports forReplicationtraffic. When an Implementation Engineer configures async or sync replication, Purity will default to looking for connectivity on these interfaces unless explicitly reconfigured. This separation ensures that heavy data replication traffic does not contend with management traffic, maintaining administrative access even during periods of high bandwidth utilization for replication. Implementation Engineers must ensure these specific physical ports are cabled to the replication network switches during installation.

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FlashArray//X R4 (and the associated //C R4) models, introduced with the PCIe Gen 4 architecture, feature support for64Gb Fibre Channel (FC)connectivity. The default Fibre Channel Host Bus Adapters (HBAs) and the accompanying SFPs shipped with this generation are64Gbcapable, marking a significant performance leap from the 32Gb standard of the R3 generation.

While the HBAs are backward compatible with 32Gb and 16Gb SAN infrastructures, the R4 platform is explicitly marketed and technically defined by its ability to drive 64Gb line speeds to match the increased throughput of the backend PCIe Gen 4 bus and DirectFlash Modules. For an Implementation Engineer verifying the bill of materials or configuring the switch ports, it is critical to know that the R4 optics are native 64Gb. If the customer's switch infrastructure is only 16Gb or 32Gb, the ports will auto-negotiate down, but theshipped default hardwareis the 64Gb standard (Option C). Option A (16Gb) and Option B (32Gb) refer to the default standards for the older //M and //X R2/R3 generations respectively.

To validate that I/O traffic is correctly distributed across a host's initiators (Fibre Channel WWNs or iSCSI IQNs), the correct command ispurehost monitor --balance.

Ensuring "multipathing balance" is a critical post-installation check. If a host is configured correctly with Multipath I/O (MPIO) software (like DM-Multipath on Linux or MPIO on Windows), read/write requests should be distributed relatively evenly across all active paths to the storage array.

Command Function:The purehost monitor command provides real-time performance statistics for hosts. Adding the --balance flag switches the view to a granular breakdown of IOPS and Bandwidthper initiatorfor the specified host.

Interpretation:An Implementation Engineer looks for initiators showing 0 IOPS or significantly lower traffic than others, which would indicate a path failure, zoning issue, or incorrect MPIO policy (e.g., Failover Only instead of Round Robin). Options A and B are incorrect syntax; purehost list shows configuration (not real-time stats), and iobalance is not a valid Purity command argument.

The output "Ping successful with CCM" is a specific success message returned by the puresupport test or purearray test connectivity checks.CCMstands forCloud Connection Manager, which is the internal service or endpoint responsible for mediating the secure connection between the local FlashArray and thePure1cloud management platform.

When an Implementation Engineer sees this message, it confirms that the array can successfully resolve and reach the Pure1 infrastructure over the internet (specifically the pure1.purestorage.com or associated regional endpoints). This validates that:

DNS is functioning correctly (resolving the CCM hostname).

Firewall rules are permitting outbound HTTPS (port 443) traffic.

The array's management interface is routing correctly.

This connection is vital for "Phone Home" logs, Remote Assist sessions, and fleet management via the Pure1 mobile app or dashboard. It is distinct from the Fusion Fleet Coordinator (which manages fleet logic) and the cross-controller interconnect (which is internal hardware communication).

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To meet the requirement of deploying a specific, newer Purity version (6.1.21) on a factory-fresh array that arrived with older code (5.3.8), the most efficient and correct procedure for an Implementation Engineer is tocreate a bootable USB stick with the target 6.1.21 ISO and reimage the controllers.

The "Factory Reset" or re-imaging process is a supported method for initial installation when the desired software baseline differs significantly from what is pre-loaded. Since the array contains no customer data yet, re-imaging is non-destructive to business operations and avoids the time-consuming process of initializing the array on old code, registering it, and then performing a multi-step software upgrade (Option C).

Procedure:The engineer downloads the specific Purity ISO from the Pure Storage Support portal, uses a tool like Rufus or Etcher (or the pureinstall utility) to create the bootable media, and boots the controllers from this USB to lay down the fresh image.

Option Bis incorrect because copying .ppkg files is part of anonline upgradeworkflow for running systems, not a re-imaging process for a raw box.

The Purity upgrade process involves two main phases: installing the software image (placing the bits on the boot drive) and then activating it (booting into the new kernel).

After the pureinstall command has successfully unpacked and staged the new Purity version, the changes are not live until the system reboots. In a Non-Disruptive Upgrade (NDU), this is done one controller at a time.

The required step to commit and run the new version is toReboot the controller.

The pureinstall workflow typically prompts for or automatically initiates this reboot.

The secondary controller reboots first, loads the new Purity version, and rejoins the cluster.

Then, the primary controller fails over services to the updated secondary, reboots, and updates itself.

A full "Reboot the array" (simultaneous reboot) would be disruptive and is not the standard procedure for an NDU. "Logging out" has no effect on the system state.

The correct procedure is tomove the 20TB chassis Data Pack (DP) to the external shelf (SH0)to free up a chassis slot for the new high-capacity pack.

Capacity Analysis:The array has ~52TB total raw capacity (20+10+22) and is 83% full (~43TB used).

Constraint:You cannot simply "evac" the chassis drives (Option A) because the remaining capacity (22TB in the shelf) is insufficient to hold the 43TB of data. Similarly, evacuating the shelf first (Option C) leaves only 30TB in the chassis, which is also insufficient.

The Solution (Option B):

Relocate:The engineer physically moves the 20TB pack from the Chassis (Slot 0) to the empty slot in Shelf 0 (SH0). This is a supported non-disruptive operation (assuming compatible shelf/pack types).

Install:This clears Chassis Slot 0, allowing the installation of the massive91TB Data Pack.

Consolidate:The system now has huge capacity (10+20+22+91). Purity can safely evacuate the old 10TB pack (Chassis) and the external shelf packs (20+22) into the new 91TB internal capacity.

Final State:The array ends up with the single 91TB pack in the chassis, meeting the "X50R2-91/0" target configuration.

Hardware Non-Disruptive Upgrades (HWNDU) rely strictly on the array being in a fully healthy state before the process begins. The validate-array-health check is designed to gate the upgrade if any component that provides redundancy or data integrity is compromised. NVRAM (Non-Volatile Random Access Memory) modules are critical components in the FlashArray architecture; they store in-flight write data to ensure it is persistent before being destaged to flash.

A "Code 60" alert specifically points to a hardware issue with an NVRAM module. While the //X70 model indeed has redundancy (often using multiple NVRAM modules), proceeding with an upgrade while one is degraded puts the array at risk. During an NDU, controllers reboot and failover; running on reduced redundancy during these critical operations is not supported and is blocked by the health checks.

The correct first step for an Implementation Engineer is to attempt toreseat the unhealthy NVRAM module. Often, connection issues or transient seating faults can trigger these alerts. After reseating, the engineer must run the health check again to confirm the module status has returned to "healthy." If the module remains unhealthy after reseating, it must be replaced before the upgrade can proceed. You cannot simply disable it or ignore it, as the upgrade script will likely refuse to continue to protect data integrity.

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On theFlashArray//XL, the designated PCIe slots forDirectFlash Shelf (DFS)connectivity areSlot 0 and Slot 6.

The FlashArray//XL features a high-density, high-performance architecture that utilizes100GbE RoCE (RDMA over Converged Ethernet)for backend connectivity to expansion shelves, replacing the SAS protocols used in previous generations.

Slot Assignment:To ensure maximum throughput and redundancy, these backend I/O modules must be balanced across the controller's PCIe bus. The hardware guide and slot map for the //XL explicitly assignSlot 0(typically on the lower riser) andSlot 6(on the upper riser) for the installation of the 2-port 100GbE NVMe-oF cards used to connect DirectFlash Shelves.

Configuration:If a customer orders a FlashArray//XL with external capacity, these cards will be pre-installed or must be seated in these specific slots by the engineer. Using other slots (like 1 or 7, which are often reserved for host I/O or other expansion cards) would result in an invalid configuration or lack of connectivity to the backend storage media.

When performing a standard installation on a FlashArray, the first logical configuration step is theCT0 configuration(typically via the puresetup utility on the primary controller).

Workflow:After the physical rack-and-stack, cabling, and power-on, the Implementation Engineer must establish a management connection to the array. This is done by connecting to the serial console or the default IP ofController 0 (CT0).

Initialization:The puresetup process on CT0 initializes the system, sets the management IP addresses (VIP, CT0, CT1), and configures the gateway/DNS. This step effectively "builds" the array cluster.

Why not C?While ensuring the array is on the target code version is critical, a "Code Upgrade" is typically performedafterthe array is initialized and network-accessible (or via the Pure1 SSU workflow). The only exception is a manual USB re-image for a factory reset, but the standard installation procedure definesConfiguration/Initializationas the primary step to bring the system online. Configuration of CT1 (Option B) happens automatically as part of the cluster creation initiated from CT0.